8.2 Power amplifiers (PAs): concepts and challenges

8.2 Power amplifiers (PAs): concepts and challenges

Power amplifiers (PAs) are part of the transmitter frontend, and are used to amplify the signal being transmitted so that it can be received and decoded within a fixed geographical area. The design of PAs, especially for linear, low-voltage operation, is still a difficult task. In practice, PA design has involved a substantial amount of trial and error, with discrete and hybrid implementations being traditionally used. The main performance parameters for power amplifiers are the level of output power it can achieve, depending on the targeted application, linearity and efficiency. There are two basic definitions for the efficiency of a PA. These are drain efficiency and power-added efficiency (PAE). The drain efficiency is the ratio between the RF output power to the DC consumed power, and the PAE is the ratio between the difference of the RF output power and the RF input power to the DC consumed power. The PAE is a more practical measure as it accounts for the power gain of the amplifier. As the power gain decreases, more stages will be required. Since each stage consumes a certain amount of power, the overall power consumption increases, decreasing the overall efficiency. While power efficiency is a performance issue, linearity is imposed by the utilised modulation technique, or by the level of output power back-off during operation.

8.2.1 Conjugate match and load-line match

The concept of conjugate match is widely known as setting the value of the load impedance equal to the real part of the generator's impedance such that maximum output power is delivered to the load. However, the delivered power is limited by the maximum rating of the transistor acting as a current generator, together with the available supply voltage.

By referring to Figure 8.1, it is evident that the device in this case would show limiting action at a current considerably lower than its physical maximum of I_max. This means that the transistor is not being used to its full capacity. To utilise the maximum current and voltage swing of the transistor, a load resistance of lower value, commonly referred to as the load-line match, R_opt is used. In its simplest form, it is defined as R_opt = V_max/I_max, assuming the generator's resistance is much higher than the optimum load resistance. Thus the load-line match represents a real compromise that is necessary to extract the maximum power from the RF transistor, and at the same time to keep the RF voltage swing within the specified limits of the transistor and the available DC supply.

Figure 8.1: Conjugate match and load-line match

Figure 8.2 illustrates the effect of the difference of gain match versus power (load-line) match on the output of a linear amplifier. The solid line shows the response of an amplifier that has been conjugate matched at much lower drive levels. The two points A and B refer to the maximum linear power and the 1 dB compression power.

Figure 8.2: Compression characteristics for conjugate match (S22) (solid curve) and power match (dotted curve). 1 dB gain compression points (B′, B) and maximum power points (A′, A) show similar improvements under power-matched conditions

In a typical situation, the conjugate match yields a1 dB compression power about 2 dB lower than that which would be obtained by the correct power tuning, shown by the dotted line in Figure 8.2. This means that the device would deliver 2 dB lower power than the device specification of the manufacturer. Since in power amplifier design, it is always required to extract the maximum possible from a transistor, the power-matched condition has to be taken more seriously, despite the fact that the gain at lower signal levels may be 1 dB or less than the conjugate-matched condition. Across a wide range of devices and technologies, the actual difference in output power, gained by the power-matched condition, may vary over a range of 0.5 dB to 3 dB [3].

However, a load-line (power) match rather than a conjugate (gain) match might cause reflections and a voltage standing wave ratio (VSWR) in a system to which it is connected. The reflected power is entirely a function of the degree of match between the antenna and the 50 ohm system. The PA does present a mismatched reverse termination, which could be a problem in some situations. An isolator or a balanced amplifier [4] is a simple and effective way of dealing with the problem.

8.2.2 Effect of the transistor knee (pinch-off) voltage

Traditional power amplifier design starts by determining the optimum load using the load-line approach as shown in Figure 8.3. The knee voltage (pinch-off voltage) divides the saturation and the linear region of the transistor and can be defined as V_ds (voltage between drain and source) at the 95 per cent of I_max point.

Figure 8.3: Effect of the knee voltage on the determination of the optimum load

The optimum load resistance is

While this is an effective approach for most power transistors, it is not suitable for submicron CMOS transistors. This is mainly due to the fact that V_knee is only about 10–15 per cent of the supply voltage for typical power transistors, while it can be as high as 50 per cent of the supply for deep-submicron technologies. Therefore, precluding the CMOS transistor from operating in the linear region does not result in optimum output power. In fact, a large portion of the RF cycle can be in the linear region. Therefore, both saturation and the linear region must be considered when determining the optimum load. This can be done using a general MOSFET equation valid in all regions of operation [5] or relying on harmonic balance simulations of circuits, with accurate transistor models, as will be discussed later.

8.2.3 Classification of power amplifiers

Power amplifiers have been traditionally categorised under many classes: A, B, C, AB, D, E, F, etc. [6]. Power amplifier classes can be categorised either as bias point dependent, such as classes A, B, AB and C, or as dependent on the passive elements in the output matching network that shape the drain voltage and current, with the transistor, in this case, operating as a switch. The choice of operating class of the power amplifier is largely determined by the wireless standard utilised. For example, many wireless standards that are located in the 900 MHz band or close to it, such as GSM, NADC (835 MHz), and other applications that use the ISM band do not require a high degree of linearity. A class E power amplifier can be employed for GSM and applications that use the ISM band, with some form of added linearisation for NADC application. In the next subsection, details of each operating class are discussed.

8.2.3.1 Class A, B, AB and C power amplifiers

The primary distinction between these power amplifier classes is the fraction of the RF cycle for which the transistor conducts. For class A PAs, the transistor is conducting for the entire RF cycle, whereas for class B PAs it is ON for half the RF cycle, and for less than half the RF cycle for class C. Class A, AB and B amplifiers may be used as linear PAs, while class C is more non-linear in nature [7].

Figure 8.4 illustrates the schematic and the associated current waveforms for the above-mentioned classes of operation. While the third-order intercept point (IP3), adjacent channel power ratio (ACPR), 1 dB compression point, and harmonics are various measures of linearity of PAs, drain efficiency and power added efficiency (PAE) of the PA are used to indicate the current drawn from the supply. The PAE is defined as

where P_{rf, out} is the RF output power, P_{rf, in} is the RF input power, and P_dc is the total DC power drawn from the supply.

Figure 8.4: Traditional illustration of the schematic and associated current wave-forms of classes A, B, AB and C

The efficiency and output power for a power amplifier operating in class A, AB, B, or C, are given by [3]

where V_dd is the supply voltage, θ is the conduction angle of the drain current, V_dsat is the pinch-off voltage (knee voltage), and I_m is the maximum drain current in the input transistor. Equations (8.3) and (8.4) are plotted in Figure 8.5a. From this figure, it is evident that an increase in efficiency, obtained by reducing the conduction angle, is achieved at the expense of the reduced output power from the power amplifier. In deep-submicron technologies, the low output power of a reduced conduction angle is a major drawback. In order to achieve the required output power, load resistance has to be lowered to impractical values comparable to values of the parasitic resistances.

Figure 8.5: (a) RF power and efficiency as a function of the conduction angle; (b) Fourier analysis of the drain current

As the conduction angle of the drain current decreases, the harmonic content of the current signal increases. The magnitude of the nth harmonic of the output drain current is given by [3]

By examining Figure 8.5b, it is clear that the DC component decreases monotonically as the conduction angle is reduced. In class B, the fundamental component is the same as in class A while the DC component is reduced by π/2. For conduction angles below π, corresponding to class C operation, the DC component continues to drop, but the fundamental component of the current signal also starts to drop below its class A level. This results in high efficiency, and lower power utilisation factor (PUF). The odd harmonics can be seen to pass through zero at the class B point. For class AB mode, the third harmonic is not negligible. Still, class AB represents a compromise between linearity, PUF and efficiency.

8.2.3.2 Class D

The class D PA is a switching mode PA, and has recently been implemented in CMOS technology. For an efficient amplifier, it would consist of a controlled switch, in which the on-resistance was zero, the off-resistance was infinite and the transition time was zero. Then the output signal would consist of the power supply switched at the rate of the input signal, with no losses in the switching device [8]. A class D PA uses the switching configuration of the MOS transistor to achieve high efficiency.

In the class D PA, current from the supply is steered between the device, when the switch is closed, and the load, when the switch is open [9]. According to the duty cycle of switching, some fraction of the input voltage is amplified to create an output voltage. If the switching is done at the output carrier frequency, the narrowband nature of the transmitted signal allows the use of RF filters to pass only the fundamental frequency component. Because of the ability to filter out unwanted components of the output signal, this type of amplification can be done with only one device, in which case the power from the supply is either sunk in the device or the load [9]. The use of a series LC circuit tunes to the output frequency and the current in the device will be a sinusoid for the period in which it conducts current [9]. In case two devices are used, each will carry a half-sinusoidal current waveform. The ideal efficiency of a class D PA is 100 per cent if the on-resistance and the output voltage are zero at the time of the close of the switch. However, this maximum efficiency cannot be obtained due to the non-zero on-resistance and finite transition time of the switch [9].

The choice of class in PAs depends on several factors. Switching-mode power amplifiers such as class D, E and F have generally higher efficiency than linear power amplifiers because an ideal switch does not have an overlapped period of non-zero switch voltage and current. Practically, however, the transition between the ON and OFF state of a switch takes a finite time, during which a substantial amount of power can be dissipated as shown in Figure 8.6. This kind of switching is called hard switching, and is one of the main reasons for efficiency reduction in switching-mode power amplifiers such as class D and F. On the other hand, the load network in class E power amplifiers is designed such that the switch voltage returns to zero with zero slope right before the switch turns on, ensuring no overlap of non-zero switch voltage and current. Figure 8.7 shows the voltage and current waveforms of soft switching. This soft switching of the class E power amplifier minimises the power loss in the switch and thus highly efficient amplification is possible for constant envelope modulated signals [10].

Figure 8.6: Waveforms of a switching-mode power amplifier with hard switching

Figure 8.7: (a) Typical schematic of a class E power amplifier; (b) its voltage and current waveforms showing the soft switching characteristics

As the supply voltage decreases, the value of the optimum load required to achieve a specific value for output power also decreases. This decrease in the load resistance will increase the matching network transformation ratio from 50 ohm, causing more losses in the matching network. This effect is less pronounced in class E than classes B [11], C and F [10, 12], making it more suitable for low-voltage operation.

8.2.3.3 Class E

Figure 8.8 shows a conceptual picture of a class E power amplifier [13, 14]. The input signal V_in toggles the switch periodically with approximately 50 per cent duty cycle. When the switch is ON, a linearly increasing current is built up through the inductor. At the moment the switch is turned off, this current is steered into the capacitor, causing the voltage across the switch V_s to rise. The tuned network is designed such that in steady state V_s returns to zero with a zero slope, immediately before the switch is turned on. The bandpass filter then selectively passes the fundamental component of V_s to the load, creating a sinusoidal output that is synchronised in phase and frequency with the input. In practical applications, V_in may be phase or frequency modulated, in which case the information embedded in the modulation is also phased to the output with power amplification [1]. By comparing V_s, and I_s in Figure 8.8, it can be observed that the switch voltage and current are never simultaneously non-zero. Since the instantaneous power dissipation of the switch is the product of these two quantities, the switch is ideally lossless, and all the power from the DC supply is delivered to the radio frequency output. In addition, the capacitor is designed to be fully discharged before the switch is turned ON.

Figure 8.8: A simplified class E power amplifier, and its steady state operation

In high-speed operation, the switch transition time can become a significant fraction of the signal period. During these transitions, the switch voltage and current may be simultaneously non-zero, causing potential power loss in typical switching amplifiers. For proper class E operation, this loss is alleviated at the turn-on transistors by a zero switch current resulting from a simultaneously zero V_s and dV_s/dt. On the other hand, turn-off transition loss is reduced by delaying the switch voltage rise unit the switch is turned off. The properties have made class E PAs attractive for high-efficiency operations.

One of the features of class E amplifiers is the large peak voltage that the switch sustains in the off state, approximately 3.56V_dd − 2.5V_min, where V_min is the minimum voltage across the transistor. Operating at class E requires either a high transistor breakdown voltage, or operating at V_dd less than the specified value for a given technology. Figure 8.9 shows the basic schematic of a class E stage, with the associated values of circuit components.

Figure 8.9: Single-ended class E resonant power amplifier

The formulas describing the dependence of various elements on output power (P_out), supply voltge (V_dd), loaded quality factor (Q_L), and operating frequency (ω = 2πf) are derived in [15], based on the following assumptions:

1. The induction of the DC choke is very high.

2. The quality factor of the series inductor (L) is high.

3. The losses in the switch are negligible.

By utilising the class E conditions, v_D(π) = 0 and i_D(π) = 0, and a 100 per cent power efficiency assumption, the drain voltage waveform of the amplifier becomes

where θ = ωt. The drain voltage waveform is Fourier transformed in order to solve the fundamental frequency phase angle φ₁ and amplitude α₁ of the signal at node A:

To achieve the correct phase at the load, an excess reactance X is added in series with the load resistance. The values for R and X are calculated using the solved α₁ and φ₁:

The maximum drain voltage occurs when θ = 2 tan⁻¹(2/π):

8.2.3.4 Class F

The basic idea behind class D and F is to shape the output signal at the drain of the transistor such that it has more of a square shape than a sinusoidal shape. The load network provides a high termination impedance at the second or third harmonics. Therefore the voltage waveform across the switch exhibits sharper edges than a sinusoid, thereby lowering the power loss in the transistor.

Figure 8.10 shows an example of a class F topology. A tank consisting of L₁ and C₁ resonates at either 2f_in or 3f_in, where f_in is the input signal frequency, thus boosting the second or third harmonics at point X. The voltage across the switch approaches a rectangular waveform as the third harmonic becomes stronger. If the drain current of M₁ is assumed to be a half-sinusoid (i.e. half-wave rectified sinusoid), then it contains no third harmonic. The product of a rectangular drain voltage and half-wave rectified current represents the power losses in the transistor. Since the power losses are minimum due to the shaping of the two signals, the efficiency can be relatively high. The theoretical efficiency of a class F power amplifier can reach 85 per cent.

Figure 8.10: Schematic diagram and output waveform of a typical class F stage

To summarise the discussion of PA classes, what determines the class of operation of the power amplifier is its conduction angle, input signal overdrive, and the output load network. Figure 8.11 shows how the PA relates to the conduction angle and the input signal overdrive. It illustrates that a given PA can be in any of the classical operating modes depending on the above two factors. For a small RF input signal V_in, the amplifier can operate in class A, AB, B or C depending on the conduction angle (bias voltage relative to the transistor's threshold voltage). The PA efficiency can be improved by reducing its conduction angle and moving the design into class C operation, but at the expense of lower output power. An alternative approach to increasing efficiency without sacrificing out put power is to increase the input overdrive such that the transistor acts as a switch. These are called saturated class A and C, class D, class E, or class R, depending on the conduction angle, and the shape of the load network.

Figure 8.11: Classical definition of power amplifier classes

8.2.4 Power amplifier linearisation

Linearisation techniques are mostly utilised in basestations due to their complexity. For mobile phones, increasing the talk time and lowering the weight of the terminal rely on having an efficient amplifier that does not consume a lot of DC power. On the other hand, an efficient amplifier is normally non-linear, while a spectrally efficient modulation technique produces non-constant envelope signals. If this non-constant envelope signal is applied to a non-linear amplifier, the signal suffers spectral growth, which leads to adjacent channel interference. One of the solutions would be to use an efficient non-linear PA and apply suitable linearisation technique to restore linearity.

The conventional linearisation techniques are feedforward, feedback predistortion [3, 11], envelope elimination and restoration (EER) [16], linearisation using non-linear components (LINC) [17], bias adaptation, and Doherty amplifier [3]. The first three techniques are complex and need adjustments, or pre-measured data to achieve the required linearisation and are used in basestations. The simplicity of the last four techniques makes them amenable to integration depending on the degree of linearity required and the channel bandwidth. Even for modulation techniques that do not require linearisation, techniques like EER, LINC, Doherty's amplifier, and bias adaptation can be used for efficiency enhancement at lower output power levels.

8.2.4.1 Feedforward

A non-linear power amplifier generates an output voltage waveform that can be viewed as the sum of a linear replica of an input signal and an error signal. A feedforward topology computes this error and with proper scaling subtracts it from the output waveform. Shown in Figure 8.12 is a simple example where the output of the main PA, V_M, is scaled down by 1/A_V, generating V_N. The input is subtracted from V_N, and the result is scaled by A_V and subtracted from V_M. We note that if V_N = V_in + V_D/A_V, yielding V_P = V_D/A_V, and V_Q = V_D, then V_out = A_V V_in. In practice, the two amplifiers in the circuit exhibit substantial phase shift at high frequencies, mandating the use of delay lines such that Δ₁ compensates for the phase shift of the PA, and Δ₂ for the phase shift of the error amplifier.

Figure 8.12: (a) Simple feedforward topology, (b) addition of delay elements

The advantage of feedforward topologies over feedback methods is inherent stability even with finite bandwidth and substantial phase shift in each building block. This is particularly important in RF and microwave circuits because inevitable poles and resonances at frequencies near the band of interest make it difficult to achieve stable feedback. Feedforward linearisation elements require passive devices such as microstrip lines, with the power loss of Δ₂ being critical. The output subtractor must be realised using a low loss component such as a high-frequency transformer [18].

8.2.4.2 Doherty amplifier

The Doherty amplifier is primarily an efficiency enhancer rather than a linearisation technique. It employs relatively linear amplifiers, which are known to have lower efficiency at lower power levels. It is used to preserve the peak efficiency at back-off points in modulation schemes that have high peak to power ratio. This means that for a given level of linearity, or spectral regrowth, a desired level of mean RF power can be achieved using the same device periphery but at substantially higher efficiency than in simple open-loop configuration.

The principle of the Doherty amplifier is to use one main power amplifier (PA) and one auxiliary PA. At maximum output power, both PAs contribute equally to the output. Upon decreasing the input drive level until typically half the maximum combined output power (−6 dB from P_max), the auxiliary PA approximately shuts down. The high efficiency of the Doherty amplifier is achieved by keeping the main amplifier at maximum device output voltage when the auxiliary amplifier is operating. The high device output voltage results in high power efficiency. The schematic of the Doherty amplifier and the corresponding output power waveforms are shown in Figure 8.13.

Figure 8.13: Basic Doherty amplifier configuration

The Doherty amplifier uses what is called the active load pull technique, which means that the whole operation is equivalent to resistance or reactance of the RF load being modified by applying current from a second phase-coherent source, which is the auxiliary amplifier. By doing so, the impedance seen by different amplifiers is a function of other elements and the common load. The load-pulling effect together with a quarter-wave transformer causes the effective load resistance to decrease with increasing drive level. This impedance transformation is necessary to keep the main amplifier device voltage at its maximum in the high-power region.

The power efficiency of the main amplifier alone is ideally constant in the high-power region. The auxiliary amplifier has its highest power efficiency at maximum output power. Therefore the complete Doherty amplifier has a high efficiency in the whole power range, especially at medium output power compared to classic power amplifier designs.

8.2.4.3 Envelope elimination and restoration

Figure 8.14 shows the block diagram of the EER (envelope elimination and restoration) linearisation scheme as proposed by Khan [16]. As the name EER implies, the envelope of the RF input is first eliminated by a limiter to generate a constant amplitude phase signal. At the same time, the magnitude of input information is extracted by an envelope detector.

Figure 8.14: Conceptual diagram of envelope elimination and restoration technique

The magnitude and phase are amplified separately, and then recombined to restore the desired RF output. A way to combine the magnitude and phase components is to use an efficient switched-mode RF power amplifier. In a switched mode PA, output power is directly proportional to the square of the supply voltage. Thus, the envelope of the RF output of a switched-mode RF PA is directly proportional to its supply voltage. Envelope and phase components can therefore be recombined if the phase signal (RF) is applied to the gate of a transistor and the magnitude signal (low frequency) directly modulates the supply. The key advantage of this EER approach is that the PA always operates as an efficient switched-mode amplifier. Thus, high efficiency can be obtained without compromising linearity.

In practice, the process of amplifying the detected envelope signal up to the necessary voltage and current capacity to modulate the PA device consumes a significant amount of power. However, modern techniques centring in high-efficiency pulse width modulation developed for high fidelity audio amplification can be used for this application, maintaining a relatively high efficiency [19]. One problem would be the bandwidth of the modulator, which would appear to be limited to a few megahertz. This limits the use of this technique to certain modulation standards.

8.2.4.4 Linear amplification using non-linear components

This technique is also known as the out-phasing amplifier. It adopts the same concept as EER in the use of non-linear power amplifiers, but avoids non-constant envelope input signals.

According to Figure 8.15, an input signal v_in(t) = a(t) cos[ω_ct + φ(t)] can be expressed as a sum of two constant-amplitude phase-modulated signals, v₁(t) = 0.5V₀ sin[ω_t t + φ(t) + theta;(t)] and v₂(t) = 0.5V₀ sin[ω_t t + φ(t) − theta;(t)] where θ = sin⁻¹ a(t)/V₀.

Thus, if v₁(t) and v₂(t), generated from v_in(t), are amplified by means of non-linear stages, and subsequently added, then the output signal will contain the same envelope and phase information as v_in(t). Realisation of v₁(t) and v₂(t) from v_in(t) requires substantial complexity, primarily because their phase must be modulated by theta;(t), which itself is a non-linear function of a(t). The separation of varying envelope signals into two constant-envelope signals is referred to as signal component separation (SCS). Recently reported work on integrated 200 MHz SCS has demonstrated a sideband suppression of 45 dBc using two open-loop, amplitude-compensated saturated wideband BJT amplifiers [20]. In practice, LINC transmitters must deal with two critical issues. First, the gain and phase mismatch between the two signal paths as shown in Figure 8.15 results in residual distortion. Second, the interaction between the non-linear amplifiers through the combiner network limits the overall linearity achieved in this open-loop configuration as the two non-linear amplifiers when connected together might cause the two phase modulated signals to corrupt each other's phase. Nevertheless, this kind of transmitter has aroused wide interest lately, and reported results have shown good linearity at 1 GHz [21].

Figure 8.15: Linear amplification using non-linear stages

8.2.5 Spectral regrowth

Abrupt changes in a digitally modulated waveform, for example, QPSK, result in envelope variation if a filter limits the bandwidth of the signal before being applied to the PA. If the power amplifier exhibits significant non-linearity, then the shape of the input signal to be transmitted is not preserved, and the spectrum is not limited to a desired bandwidth. This effect is called spectral regrowth, and can be quantified by the relative adjacent channel power. Figure 8.16 illustrates this effect in the case of a QPSK signal applied to a weakly non-linear power amplifier.

Figure 8.16: Spectral regrowth due to amplifier non-linearity

In order to limit spectral regrowth, linear power amplifiers are usually utilised. However, linear PAs are usually less efficient than non-linear ones since they consume a considerable amount of power with respect to the rest of the portable phone. Non-linear PAs, on the other hand, exhibit efficiencies as high as 60 per cent. Thus, it is desirable to employ modulation schemes that do not experience spectral regrowth when processed by non-linear amplifiers.

Table 8.1 shows basic modulation techniques of some standards. Techniques employing π/4-DQPSK and QPSK/OQPSK require a highly linear power amplifier to limit the spectral growth caused by their abrupt phase changes. Although standards employing GMSK, FM and GFSK do not require high linearity, some standards like GSM have power control mechanisms that necessitate efficiency enhancement techniques at lower power levels. Another feature required of power amplifiers in digital wireless standards is control of output power. For example, in TDMA systems such as IS-54 and GSM, the PA is turned on and off periodically to save power. Also in IS-95, the output power must be variable in steps of 1 dB. In class 1 Bluetooth radio, the output power must be controlled from 4 dBm to 20 dBm in steps of 2, 4, 6 or 8 dB.

Table 8.1: Example of some digital wireless standards

Parameter	NADC	IS-95 CDMA	GSM	Bluetooth	IEEE802.11
RF Tx. Freq. (MHz)	824–849	1860–1910	890–915	2400–2497	2400–2497
Multiple access	TDMA/FDM	CDMA/FDM	TDMA/FDM	Frequency hopping	DSSS
Duplexing	FDD	FDD	FDD	TDD	TDD
Modulation	π/4-DQPSK	QPSK/OQPSK	GMSK	GFSK	DQPSK
Peak to average ratio	3.5 dB	10 dB	1.5 dB	0 dB	0 dB
Spectral regrowth	Medium	High	Low	Low	Medium